Advanced Flexible Reach, Wideband FPGA transceiver techniques for 25G and beyond
A lecture by Dr. Ken Chang, Xilinx
Thursday, 21 April 2016, 2–3PM
Room B.0.17, Tyndall National Institute, Cork
Co-sponsored by IEEE Solid-State Circuits Society (United Kingdom and Ireland Chapter) and Tyndall National Institute
Admission is free but space is limited.
For externals to Tyndall, if you plan to attend, please e-mail email@example.com in advance with the subject “CHANG”.
Wireline data rates have continued on the pace of doubling every four years. This is driven by multiple applications such as data center, computing, storage, wired/wireless communications, video, etc. 25G recently has become widely adopted by most of the high end applications. The industry is also in the fast transition to adopt new signaling, medium to support the next generation systems using 56G transceivers. FPGA transceivers must provide flexible reach and wideband properties to cover most of these diversified applications and yet meet the performance target at the highest supported line rate. This talk will cover two transceivers: the first is a fully-adaptive 0.5-32.75Gb/s transceiver embedded in a 20nm CMOS FPGA. The second is a 3-tap 64Gb/s NRZ transmitter in 16nm FinFET. In addition to the transceiver design, the talk will also provide selected case studies in the challenges facing this type of high-performance transceivers.
Ken Chang received his M.S. and Ph.D. degrees from Stanford University in 1994 and 1999 respectively, and his B.S. degree from National Taiwan University in 1990, all in electrical engineering department. He is now with Xilinx as the vice president for the world wide transceiver team. Prior to Xilinx, he was with Rambus from 1999 to 2010. At Xilinx, he led the team developing transceiver products in 28nm, 20nm CMOS, and 16nm FinFet technology, covering first 28G long reach transceiver for FPGA, and 10G KR and PCIE compliant transceivers. Dr. Chang currently holds 15 approved U.S. patents in the high-speed link area. He has authored and co-authored over 30+ IEEE technical papers.
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